An assessment of automated extraction capabilities for small-signal modeling of various GaAs pHEMT processes

A new automated small-signal GaAs pHEMT model extraction technique based on the analytical approach followed by optimization is suggested. The performance capability of the technique is confirmed by successful small-signal modeling of pHEMTs manufactured by different semiconductor fabs.


Introduction
Use Small-signal models of microwave transistors have a relatively wide range of applications including evaluation and investigation of device physics, an analysis of device performance, assessment and comparison of various process technologies [1], noise and nonlinear transistor modeling [2,3] and also the MMIC design. There are a lot of papers devoted to extraction of pHEMT small-signal equivalent circuits with various circuit layouts and extraction routines. However, research has shown that the existing extraction techniques demonstrate uncertainty in terms of accuracy when applied to GaAs pHEMTs, manufactured by different fabs. Moreover, the techniques have different degrees of the automation capability, although it is of great importance providing the modern production rates. This paper suggests a new automated technique aimed at suppressing the constraints of the existing approach-es to small-signal modeling of GaAs pHEMTs manufactured by different semiconductor fabs.

Devices under test and experimental technique
In the research we analyzed a small-signal GaAs pHEMT model. In order to confirm the performance capability of the suggested technique, small-signal models of the three GaAs pHEMTs with the total gate width of 4x40 um and 4x50 um, manufactured by different fabs, were extracted. Validation of the obtained models were carried out by comparing simulated and measured scattering parameters (S-parameters) of the pHEMTs. * Corresponding author: andrei.salnikov@main.tusur.ru

A technique for automated extraction of the small-signal GaAs pHEMT model
The research is focused on development of the automated extraction technique applicable for small-signal GaAs pHEMT modeling. Considering the constraints peculiar to the existing small-signal modeling approaches, the new technique should have met the following requirements: 1) the technique should imply automation capability in terms of model parameter calculation to shorten the total time of model building; 2) the technique should not be purely optimization-based, as, in this case, the physical background of a model becomes questionable and the total model accuracy may degrade due to inaccurate initial guess; 3) the technique can be applied for small-signal modeling of GaAs pHEMTs, manufactured at different fabs, with the total gate width of different sizes. In this paper we consider the problem of small-signal modeling related to GaAs pHEMTs from different fabs, while nearly the same gate width for all the devices under test was selected for simplicity.
As the result of the experimental study, the new automatable technique was derived, which enables to obtain the most accurate small-signal models of transistors manufactured at different fabs. The layout of the small-signal equivalent circuit, applied in this paper, is shown in Fig. 1. At the first step the extrinsic capacitances of the equivalent circuit are calculated using the small-signal admittance parameters (Y-parameters) of the cold pHEMT (at zero drain-source voltage), measured under a strong pinched-off condition (at Vgs << Vp) as in this biasing mode the equivalent circuit demonstrates purely capacitive behavior at low frequencies [4]. It is worth noting that in the suggested technique a linear regression is applied to automate the calculation of the extrinsic capacitances. Inductances and resistances of the transistor electrodes and contact regions are determined using the small-signal impedance parameters (Z-parameters) of the cold pHEMT, measured under an unbiased condition (at zero Vgs). The extraction routine of these extrinsic parameters is based on technique re-ported in [5]. However, in the suggested technique the resistances of the transistor contact regions are also extracted from the slopes of the real part of Z-parameters versus ω2 which enables to diminish influence of measurement uncertainty and frequency dependence of real part of Zparameters on the resistance values to be extracted. As a rule, the frequency dependence is caused by incomplete de-embedding of pads and transmission lines of the microwave pHEMT structure. The intrinsic equivalent circuit parameters are calculated using the measured small-signal Y-parameters of a pHEMT at a certain bias point, according to the technique reported in [6]. The results of extraction of equivalent circuit parameters for GaAs pHEMTs, manufactured at different fabs, are listed in Table 1. An important step before calculating the intrinsic equivalent circuit parameters is to de-embed the parasitic contribution of the extrinsic capacitances, inductances and resistances, determined earlier, from the measured S-parameters of a pHEMT at a bias point where the small-signal model is required. To automate the process of the intrinsic equivalent circuit parameters calculation, the suggested technique was enhanced with the procedure which selects an appropriate intrinsic parameter value from the whole frequency range of available values [6]. The calculated extrinsic and intrinsic equivalent circuit parameters act as an initial guess for the further step of optimization. Fig. 2 shows a comparison between simulated and measured S-parameters of pHEMTs, manufactured at three different fabs. The analysis of the obtained results confirms that the simulated and measured Sparameters agree well for all the devices despite the place of manufacturing. Hence, the suggested technique enables to automatically extract small-signal equivalent circuit-based models of GaAs pHEMTs manufactured at different semiconductor fabs.

Conclusion
A new automated extraction technique applicable for calculating the parameters of GaAs pHEMT equivalent circuit parameters is suggested. The technique includes analytical extraction of parasitic and intrinsic parameters with subsequent optimization. Validation of the technique was carried out by building the smallsignal models of the three pHEMTs with the total gate width of 4x40 um and 4x50 um, manufactured at different semiconductor fabs. An excellent agreement between the simulated and measured S-parameters confirms the performance capability of the technique.

Acknowledgment
This work was funded by Russian Science Foundation (project No 19-79-10036).