A SiGe 3-stage LNA for automotive radar application from 76 to 81 GHz

. This paper presents the simulation results of the W-band 3-stage low noise amplifier which is designed in 0.13 μ m SiGe BiCMOS technology. The LNA achieves a peak S 21 of 24.1 dB and noise figure of 6 dB at 80 GHz with 3 dB bandwidth of 14 GHz from 73 to 87 GHz. S 11 is better than 11 dB. The simulated input 1 dB compression point is – 23 dBm at 80 GHz with low power consumption of 26 mW from 1.2 V voltage supply. Layout area is 0.36 mm 2 .


Introduction
Low noise amplifier (LNA) is the key element of the receiving path of any transceiver. The function of the LNA is pre-amplification of weak signals induced in the antenna without significantly degrading the signal-to-noise ratio. W-band LNAs are used in radars for various purposes (76-77 GHz long range automotive radars for adaptive cruise control and collision avoidance, 77-81 GHz short range parking radars [1], radars for non-contact level measurement [2], etc.), as well as in high speed wireless communication links with data rates up to 80 Gbit/s [3].
An important condition for the development of W-band systems is the emergence of electronic components and devices with acceptable parameters and cost. This paper presents the simulation results of the W-band LNA for radar application from 76 to 81 GHz which is designed in 0.13 μm SiGe BiCMOS technology process with current-gain cutoff frequency/maximum oscillation frequency (f T /f max ) of 300/500 GHz. Fig. 1 shows a detailed schematic diagram of W-band low noise amplifier with device parameters, supply and bias voltages. The LNA consists of 3-stage using cascode topology to reduce the influence of the Miller effect and obtain high gain.

Amplifier design
The technique described in [4] was used for the simultaneous optimal matching of noise and input impedance. All transistors biased at current density that minimizes noise figure (NF). Transistor sizes are selected such that the real part of the optimum noise impedance is approximately equal to the source impedance at the 80 GHz. To obtain the maximum power transfer the LNA input impedance is matched to the source impedance (50 Ω). Microstrip * Corresponding author: vadim.budnyaev@yandex.ru  Table 1. The supply voltage is 1.2-1.8 V while the base voltage of transistors Q1, Q3, Q5 is 0.9 V which leads to the collector currents of about 7-8 mA. According to simulation, obtained current density is optimal for achieving low NF and high gain.   TL1  70  7  TL2, TL6, TL10  40  15  TL3, TL7, TL11  85  15  TL4, TL8, TL12  30  15  TL5, TL9, TL13  90  7 The layout of the mm-wave LNA is shown in Fig. 2. It occupies 740×480 μm (0.36 mm 2 ) with pads and 563×308 μm (0.17 mm 2 ) without pads. Contact pads have dimensions of 80×80 μm. Distance between their centers is 150 μm (standart probe station pitch). Input and output RF pads were custom designed with the dimensions 53.33×80 μm to reduce parasitic capacitances, and also the edges were trimmed to further decrease the parasitic capacitance.

Simulation results
In the W-band, the pads capacitance and package parasitic elements cannot be neglected in the simulation process. The paper [5] presents the results of measurements of flip-chip ball grid array (FCBGA) package parasitic resistances, capacitances and inductances. Using this data and equivalent circuit for FCBGA-package interconnect effects from [6], a virtual test bench was designed for more correct LNA simulation. The simulated S 21 and S 11 versus frequency at different supply voltages are shown in Fig. 3. The LNA at standart 1.2 V has a peak gain of 24.1 dB at 81 GHz with 3 dB bandwidth (BW) of 73-87 GHz. The S 11 is less than -10 for 70-110 GHz. The simulated S 22 (not shown) is less than -7 dB at 3 dB BW. At supply voltage 1.8 V parameters change slightly (3 dB BW expands to 16 GHz, S 21 > 20.5 dB, S 11 < -9.5 dB).     where 21 S is the average power gain in magnitude; BW is the 3-dB bandwidth in GHz; F is the noise figure in magnitude, and DC P is the power consumption in mW.

Conclusion
The W-band 3-stage cascode low noise amplifier using 0.13 μm SiGe BiCMOS process with f T /f max of 300/500 GHz is presented in this paper. The LNA has a high S 21 of >21 dB, NF of 5.5 to 6.6 dB in 3-dB BW of 14 GHz. The S 11 is lower than -10 dB from 70 to 110 GHz. The simulated input IP 1dB is -23 dBm at 80 GHz. The supply voltage and power consumption are 1.2 V and 26 mW, respectively. The layout area is 0.36 mm 2 with all of the contact pads and 0.17 mm 2 without pads. The amplifier is expected to integrate in the front-end transceiver of single-chip automotive 77-81 GHz short range radar.