A GaAs Low Noise Amplifier for 2.4 GHz ISM band Applications

. In this paper, a Low Noise Amplifier (LNA) operating in the Industrial Scientific and Medical (ISM) band of 2.45 GHz is proposed. The designed LNA is based on GaAs ATF21170 active device. To improve gain and matching parameters, a hybrid matching technique based on smith chart and optimization is used. The proposed biasing network as well as the stabilization circuit allow achieving a minimum noise figure with an unconditionally stability over the whole operating frequency ranging from 2.25 GHz to 2.55 GHz. Finally, some tradeoffs were done to obtain the minimum noise figure with the greatest available power gain. In terms of performances, the proposed structure shows an excellent noise figure of ~1Db.The simulated results show an excellent input/output return loss under -15 dB over the operation frequency band with an excellent small signal gain ranging between 17 dB and 15 dB. In terms of large signal performance, the proposed LNA achieves an output power of 17 dBm (52 mW) with a PAE of 22% and an output intercept IP3 around 27 dBm.


Introduction
A Low Noise Amplifier (LNA) is an RF device that amplifies a very weak signal without significantly degrading its SNR (signal-to-noise ratio) [1][2][3]. In fact, an RF amplifier will not only amplifies the power of both the signal and the noise available at its input, but it will introduces certain additional noise due to its internal noise sources [4][5][6][7][8]. As a result, the LNAs are designed so that its internal noise sources minimally contribute to output noise power [9][10].
The LNAs are generally placed at the front-end wireless receivers, and plays the role of amplifying the very weak received signals to the point that they can correctly processed by the next stage signal-processing devices [11][12][13]. In addition, the LNAs set the system total noise figure or sensitivity [14].
The additional noise introduced by the LNA internal noise sources can reduced by choosing low-noise components, the bias operating points and the circuit topology. In addition, the input matching circuit for an LNA is designed to be low loss to reaches the minimum possible noise figure [15][16][17].
Suitable characteristics of an LNA are unconditionally stability, low noise figure and high gain, high third-order intercept point (IP3), high dynamic range, low input/output reflexion coefficients, broad bandwidth, low power dissipation and compact size. However, there are tradeoffs in these characteristics during designing [13].
The LNA can in a single stage or multistage configuration. In a multistage topology, the input matching circuit is designed for minimum noise figure, the interstage matching is synthesised for flat gain, and * Corresponding author: ribate.mohamed@gmail.com the output matching circuit is designed for maximum output power and gain [18][19].
The present paper exposes the design and implementation of a Low Noise Amplifier operation around the 2.4 GHz ISM band. The paper is organised as follows. In section 2, the proposed LNA design flow is presented. Section 3 is devoted to the obtained results and discussions, and the concluding remarks are summarized in section 4.

Overview
The design of an LNA, as that of any other electronic circuit, is typically subdivided into a series of systematic steps, from the LNA design specifications up to the final characterization of the fabricated circuit. In fact, starting from the LNA design specifications, the first pass consists of selecting the design process and the subsequent selection of the active device type. The latter is chosen according to the required operating frequency and the targeted application. After the proper active device selection, the next step resides in DC analysis in order to select the proper bias operating point that fulfil the electrical specifications.
On the other hand, the overall LNA stability is very crucial and has to be enforced not only in the operating frequency band but for the whole active device operating frequency band: especially, for the low frequency range, where the higher active device gain could introduce oscillations because of the feedback components intrinsically present in active device and the LNA circuit. Thus, the subsequent step of DC analysis is stability analysis.
The remaining steps consist of designing the biasing, input and output matching networks. The latter can be designed using both lumped or distributed elements. In this work, the distributed transmission lines are adopted.
In terms of characterization and validation process, the proposed LNA pass first by small signal analysis, then, the obtained results are consolidated by nonlinear analysis and finally validated by the EM Co-Simulation.

DC analysis
In this work, the adopted active device is ATF21170. The proposed LNA is designed to operate around the class A operating point, which allows the highest possible linearity, the ‫݀ܫ‬ ௦௦ /2 bias operating point is selected.

Stability analysis
The operating frequency of the selected active device starts from 0.5 GHz to 6 GHz, therefore, the main goal during the stability analysis is the achieve the unconditionally stability and tradeoffs over the whole active device operating frequency band.
On the other hand, if we have to stabilize the active device, the easiest way consists of introducing some resistive components at the input and the output of the active device respectively. For example, at the input side, we can simply introduce a series resistor, this latter can significantly improve the active device stability. However, in case of LNA design where the main goal is to obtain minimum noise figure possible, by introducing a series resistor at the active device input side, we can achieve the unconditionally stability but at the same time, we increase the noise figure and decrease the small signal gain.
Therefore, as a good practical tip, we should avoid any lossy components at the input side of an LNA as much as possible so the noise figure is not distorted beyond a point. Hence, if we have to introduce any lossy component, especially a series resistor, we should always include it at the output side, because referring to the Friis formula (used to calculate the total noise figure in case of a cascade architecture), the noise introduced by the output series resistor will be divided by the active device gain. The whole idea here is to balance the active device stability, the noise figure and the gain.
Basing on the above discussion, the proposed stability components are shown in figure 2.

Fig. 2. The proposed stability components
At the active device output, a series resistor of 15 Ω is selected, while at the input side, a shunt RC network is introduced. Here a proper attention is taken while selecting the resistor value; this latter is selected in such a way that is the highest possible value to achieve the stability plus not letting the gain and the noise figure decrease so much around the desired operating frequency band. The role of the capacitor is simply blocking the DC going to the ground, because we want the DC going directly to the active device and not anywhere else. Using these stability networks, the obtained results are shown in figure 3.
As we can remark, the stability analysis was performed using the Edward-Sinsky factors :{ߤ ; ߤ′}, which are geometrical factors.
From figure3, using the proposed stability networks, the active device is unconditionally stable across the entire operating frequency band ranging from 0.5 GHz to 6.0 GHz. It is worth noting that in terms of R1, R2 and C1 values, this is the best possible combination we could come up with that provides an unconditionally stability over the whole active device operating frequency as well as a good noise figure and small signal gain at the desired operating frequency (at 2.4 GHz).

Bias network design
Biasing of active devices comprises two parts: the selection of a bias Q-point for an optimum performance in terms of noise figure, gain, output power, etc. and the biasing network itself. Here, the first part was done above, and we will handle the second part at this section.
In fact, a biasing network consists of a DC block and an RF chock. It is up to the designer, the chock can be realized using an RFC, especially for low frequency applications, or using a ߣ/4 high impedance transformer. In this work, we opt for the ߣ/4 bias network. In terms of substrate, the Rogers RO4350B was used. The proposed biasing network is shown in figure 4. For the connection purposes, two 50Ω transmission lines segments are added in the input and the output of the proposed biasing networks as shown in figure 4. It is worth noting that it is very important to model all possible discontinuities to account for their effect including the decoupling capacitors etc. In addition to the high impedance quarter-wave microstrip line, a bypass capacitor of 470 pF is used to connect this latter to the ground. However, a good thing to remember is that capacitor will have a footprint on the PCB, and this footprint will have certain physical size. In fact, the concept on which the quarter-wave microstrip line is working it is assuming a ground at the A point ( figure  4), consequently, the λ/4 microstrip line will be considered as an open circuit at the B point shown in figure 4. Therefore, an RF signal from the input port (IP) will see a perfect open circuit at the B point, and the RF energy will transmitted to the output port (OP).
The obtained S-Parameters simulation results are shown in figure 5 and figure 6 respectively. From the S11 and S22 responses, we obtain a perfect matching at the frequency center of our desired frequency band as well as we obtain a good enough bandwidth to play with (the red dashed square represent the bandwidth under -20 dB). In addition, from the S21 curve, we obtain a perfect transmission at the 2.4 GHz. On the other hand, the λ/4 line which we have at the 2.4 GHz (the red A point) will be λ/2 at the 4.8 GHz (the red B point), consequently, we obtain a perfect short-circuit at the 4.8 GHz. Therefore, if we have any harmonic coming into the amplifier, it will be grounded. Similarly, from the S21 response at the 4.8 GHz, we obtain a very high rejection from the input to the output.

Impedance matching requirement
Before we start looking at impedance for matching purposes, it is recommended to visualize and model as many transmission lines, discontinuities etc. as possible.
This will help to avoid extra rework during matching network design phase, which will make the circuit design suitable for layout generation eventually.
On the other hand, before starting the impedance matching design process, we need information about the input and output impedance values of the resulted circuit including the active device, the stability components and the biasing networks.
For this reason, we perform a preliminary Sparameters simulation. The obtained results are illustrated in figure 7, 8 and 9 respectively.  figure 8, the output impedance value is around {49 -24*j Ω}. However, for the input side, three approaches can be adopted during the determination of the input impedance value. From figure 7, if we opt for a noise figure minimum ‫ܨܰ(‬ ), then we can use 18.42 -0.45*j Ω as an input impedance, however, if we opt for the best input reflexion coefficient, then 8.52 -4.5*j Ω can be adopted as an input impedance value.
Moreover, from the figure 9, the third approach consists of choosing between the input impedance that produce a minimum noise figure around 1.1 dB {9 + 5.7*j Ω} and the other that allows achieving a high gain around the 16 dB {7.73 -0.87*j Ω}.
However, by comparing the input impedance that produce the best possible input reflexion coefficient and the other one that produce a noise figure around 1.1 dB, we can remark that are very close. Therefore, if we choose for example 8.5 -4.5*j Ω as an input impedance, we will obtain the best possible input reflexion coefficient with a noise figure around 1.1 dB. Basing on the above discussion, the selected source and load impedances that we have to match are summarized in the table below:

The proposed matching networks
From the discussion above, we have now the information about the load and source impedances that we have to match. So, the next step consists of designing the input matching network that match 50 Ω to 8.5 -4.5*j Ω as well as the output matching circuit that transform the output 50Ω to 49 -24*j Ω. The preliminary proposed input and output matching networks are illustrated in figure 10 and 11. As we can see, the preliminary proposed matching networks are based on transmission lines that are in terms of impedance and electrical length. Therefore, a further transformation is needed in order to obtain the practical matching networks.

The proposed LNA
The proposed LNA layout is illustrated in figure 12. The amplifier is implemented on Rogers RO4350B substrate and based on ATF21170 active device. The latter is a GaAs transistor. As we can remark, the input and output matching networks as well as the biasing circuitry all are designed using microstrip transmission lines. The proposed LNA is designed to operate around the ISM band 2.4 GHz.

Results and discussions
In this section, the obtained results are presented and discussed. The characterization and validation of the proposed LNA is subdivided into several steps. The first one consists of performing the small signal simulation. The latter allows checking small signal performances in terms of reflexion coefficients, the small signal gain, the reverse isolation coefficient, the stability and the noise figure. The next step consists of performing the EM Co-Simulation. In fact, the EM Co-Simulation provides the closest result to the real performances. Thereafter, the nonlinear simulation is performed. The aim of this simulation is to validate the nonlinear performances in terms of output power, the third order intercept point (IP3) and inherently the linearity, and the power added efficiency (PAE). Finally, the EM Circuit Excitation is performed as a final step in the characterisation and validation process.

Small-Signal & EM Co-Simulation results
The small-signal results versus the EM Co-Simulation performances are presented in this subsection. Figure 13 and 14 show the input and output reflexion coefficients performances. As we can see, the proposed LNA achieves an excellent impedance matching with an input/output return loss below than −15 ‫ܤ݀‬ over the operating frequency band ranging from 2.25 GHz to 2.55 GHz. On the other hand, the EM Co-Simulation shows a slight degradation of the input return loss and a bit improvement of the output return loss, but in overall, the obtained results still show excellent impedance matching performance.  On the other hand, the proposed LNA shows an excellent small signal gain changes between 15 dB and 17.5 dB over the completely operating frequency band. Again, the EM Co-Simulation shows a slight degradation of 0.5 dB but the proposed LNA still shows an excellent small signal gain as illustrated in figure 15.

Nonlinear performances
In this subsection, the nonlinear performances in terms of output power, PAE, the gain compression, the intermodulation products and the IP3 are presented and discussed.  figure 19. On the other hand, from those figures, the required input power that tends the proposed LNA into 1-dB compression is around zero dBm. Also, the proposed LNA reaches a maximum PAE of 22.5% as depicted in figure 20. On the other hand, harmonics and intermodulation products are undesired signals. They create leakage into adjacent channels, noise and distortion, etc. The typical way of dealing with the troublesome products is through filtering, but this becomes difficult when the products are very close in frequency to the desired (fundamental) signals. In fact, in two-tone simulation, the LNA output, in addition to the DC, fundamental frequencies, second harmonics and third harmonics, also contains secondorder intermodulation products at f1 ± f2 and third-order intermodulation products at 2f1 ± f2 and 2f2 ± f1. In a narrowband amplifier and when f2 and f1 are very close to each other, all frequencies except f1, f2, 2f1 − f2, and 2f2 − f1 can be filtered out. However, the third-order products, which are very close to the fundamental frequency f1 or f2, are very difficult to be filtered out and will distort the desired signal.
Referring to the third-order products, the intercept IP3 is defined as the point where the power in the fundamental tone and the third order product are equal if the amplifier is assumed to be linear. The two-tone simulation results of the proposed LNA are illustrated in figure 21.  figure 21, the third order product of the proposed LNA has a very weak power around -97 dBm at -30 dBm as input power, which is very weak, while the fundamental power is around -14 dBm at the same input power.
On the other hand, the input point where the power in the fundamental tone and the third-order product are equal (if the LNA assumed to be linear) is around 11 dBm as illustrated in figure 21 (IIP3=11.113 dBm). Moreover, the proposed LNA shows an output intercept OIP3 around 27.5 dBm.

EM Circuit Excitation results
The EM-Circuit Excitation simulation allows visualizing field data such as surface currents and far field of the EM Model/EM Co-simulation used with any circuit elements contribution in the schematic. The obtained results are presented below. At the DC frequency, the only current visualized on the structure is the drain current, the gate current is not visualized because it is very small with respect to the drain current as illustrated in figure 22.  On the other hand, at the fundamental frequency (figure 23), the output part of the proposed structure shows more current propagation than the input part. This because of the active device gain. By feeding -20 dBm for example at the input port, we will obtain about -5 dBm at the output side and inherently more current propagation.
However, as for the second harmonic, all current are absorbed by the bias network (figure 24), which confirms the above statement about the proposed biasing circuits. They are regarded as λ/4 at the fundamental frequency and as λ/2 at the second harmonic component.
For the third, fourth and fifth harmonics, the amount of the propagated current is very small (for example figure 25).  On the other hand, thanks to the proposed bias and stability circuits, the proposed LNA shows excellent results in terms of noise figure and stability compared to the references listed in table 2. Moreover, the results obtained in terms of output power, gain compression and intermodulation distortion promote the positioning of the proposed LNA compared to other LNAs.

Conclusion
In this paper, a low noise amplifier (LNA) operating around the 2.4 GHz ISM band is presented. The proposed LNA is based on GaAs ATF 21170 active device and implemented on Rogers RO4350B substrate.
With the neatly designed stability, biasing and matching networks, the proposed LNA reaches an unconditionally stability over the whole operating frequency band ranging from 2.25 GHz to 2.55 GHz with an excellent noise figure around 1 dB. In terms of matching performances, the proposed LNA shows an excellent input/output return loss, both below that -15dB over the entire operating frequency band. On the other hand, the proposed LNA shows excellent nonlinear performances. In fact, the introduced LNA reaches a saturated output power around 17.5 dBm (56.2 mW) with a PAE of 22.5%. In terms of linearity, the proposed LNA achieve an excellent input third-order intercept point (IP3) of 11 dBm with and output IP3 around 27.5 dBm. An LNA with these performances is very suitable for many applications operating around the 2.4 ISM band such as medical microwave imaging, the 802.11 small radiation application, etc.