ITM Web Conf.
Volume 46, 2022International Conference on Engineering and Applied Sciences (ICEAS’22)
|Number of page(s)||6|
|Section||Embedded Systems and Reconfigurable Architecture|
|Published online||06 June 2022|
Design and Simulation of a Median Filter for a CubeSat Image Processing Application Using an FPGA Architecture
1 LASTIMI Laboratory, EST Salé, Mohammed V University in Rabat, Morocco
2 CURTS, EMI, Mohammed V University in Rabat, Morocco
3 ICES Team, ENSIAS, Mohammed V University in Rabat, Morocco
* Corresponding author: email@example.com
CubeSats are small satellites that can perform space missions with the advantage of low cost and short development time. Earth observation is a well-known satellite use case that has found its place in the CubeSat community. To improve the quality and the number of images that can be received from the satellite, image processing techniques can be performed. Satellite images can be disturbed, and the median filter is a pre-processing technique usually used to remove impulse noise. The aim is to develop an architecture for CubeSat onboard image processing, starting with the design of a median filter. This paper presents the design and the simulation process of a 3x3 median filter based on the Spartan 6 FPGA architecture using software components. Simulation results are generated using a test bench algorithm and a visual comparison of both the input and output images is performed.
Key words: CubeSat / image processing / median filter / FPGA
© The Authors, published by EDP Sciences, 2022
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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