| Issue |
ITM Web Conf.
Volume 50, 2022
Fourth International Conference on Advances in Electrical and Computer Technologies 2022 (ICAECT 2022)
|
|
|---|---|---|
| Article Number | 02005 | |
| Number of page(s) | 8 | |
| Section | Electronics & Communication Systems | |
| DOI | https://doi.org/10.1051/itmconf/20225002005 | |
| Published online | 15 December 2022 | |
64 Bit Binary Counter with Minimal Clock Period
Department of Electronics and Instrumentation Engineering Shri G.S. Institute of Technology and Science, Indore, India
vaishnaviy401@gmail.com
ppbansod43@gmail.com
mishradrc@gmail.com
Novel rapid formations of synchronous binary counting with single minimum period of counting for practical counters are developed in this project. A synchronous binary counter is required in many applications since it is rapid, also can help a broad bit-width. Basically, because of massive fan-outs and extensive carry chains, earlier counters have a limited counting rate, mainly when size of the counter is not modest. It employs a single bit Johnson counter to decrease whole hardware complications, then copy it to lessen the propagation latency caused by huge fan-outs. In this paper, re programmable the clock utilized in it for various applications functioning at different clock rates and there’ll be a variation within the delay values because the clock is reprogrammed the critical may varies for various rates. The counter output results are obtained for various bit up to 64 and therefore the design provides various clock rates with variations in area and delay.
Key words: Backward Carry propagation / Johnson Counter / Pre scale Enable Signal / Ring counter / Binary counter
© The Authors, published by EDP Sciences, 2022
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