Open Access
Issue
ITM Web Conf.
Volume 37, 2021
International Conference on Innovative Technology for Sustainable Development (ICITSD-2021)
Article Number 01021
Number of page(s) 6
Section Innovative Technology for Sustainable Development
DOI https://doi.org/10.1051/itmconf/20213701021
Published online 17 March 2021
  1. Johnson, Neil & Mycroft, Alan. (2004). Using Multiple Memory Access Instructions for Reducing Code Size. 2985. 265-280. 10.1007/978-3-54024723-4_18. [Google Scholar]
  2. Yi Yang, Ping Xiang, Jingfei Kong, and Huiyang Zhou. 2010. A GPGPU compiler for memory optimization and parallelism management. SIGPLAN Not. 45, 6 (June 2010), 86–97. DOI:https://doi.org/10.1145/1809028.1806606 [Google Scholar]
  3. Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, and Yunheung Paek. 2011. Memory access optimization in compilation for coarse-grained reconfigurable architectures. ACM Trans. Des. Autom. Electron. Syst. 16, 4, Article 42 (October 2011), 27 pages. DOI:https://doi.org/10.1145/2003695.2003702 [Google Scholar]
  4. Steve Carr, Kathryn S. McKinley, and Chau-Wen Tseng. 1994. Compiler optimizations for improving data locality. SIGPLAN Not. 29, 11 (November 1994), pp. 252-262. [Google Scholar]
  5. Sarkar S., Tullsen D.M. (2008) Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture. In: Stenström P., Dubois M., Katevenis M., Gupta R., Ungerer T. (eds) High Performance Embedded Architectures and Compilers. HiPEAC 2008. Lecture Notes in Computer Science, Vol 4917. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540- 77560-7_24 [Google Scholar]
  6. Barik, Rajkishore. “Efficient optimization of memory accesses in parallel programs.” (2010) Diss., Rice University. https://hdl.handle.net/1911/62060. [Google Scholar]
  7. Hee-Seok Kim, Izzat El Hajj, John Stratton, Steven Lumetta and Wenmei Hwu. “Locality Centric Thread Scheduling for Bulk-synchronous Programming Models on CPU Architectures,” in Proceedings of the 2015 International Symposium on Code Generation and Optimization (CGO ’15), February 2015. [Google Scholar]
  8. A. Monsifrot, F. Bodin, and R. Quiniou, “A machine learning approach to automatic production of compiler heuristics,” in Proc. Int. Conf. Artif. Intell. Methodol. Syst. Appl., 2002, pp. 41–50. [Google Scholar]
  9. H. Leather, E. Bonilla, and M. O’Boyle, “Automatic feature generation for machine learning based optimizing compilation,” in Proc. 7th Annu. IEEE/ACM Int. Symp. Code Generat. Optim. (CGO), Mar. 2009, pp. 81–91 [Google Scholar]
  10. H. Yu and L. Rauchwerger, “Adaptive reduction parallelization techniques,” in Proc. 14th Int. Conf. Supercomput. (ICS), 2000, pp. 66–77. [Google Scholar]
  11. Y. Ding, J. Ansel, K. Veeramachaneni, X. Shen, U.-M. O’Reilly, and S. Amarasinghe, “Autotuning algorithmic choice for input sensitivity, ” in Proc. 36th ACM SIGPLAN Conf. Program. Lang. Design Implement. (PLDI), 2015, pp. 379–390. [Google Scholar]
  12. Z. Wang and M. F. O’Boyle, “Mapping parallelism to multi-cores: A machine learning based approach,” in Proc. 14th ACM SIGPLAN Symp. Principles Pract. Parallel Program. (PPoPP), 2009, pp. 75–84. [Google Scholar]
  13. P. Zhang, J. Fang, T. Tang, C. Yang, and Z. Wang, “Auto-tuning streamed applications on Intel Xeon Phi, ” in Proc. 32nd IEEE Int. Parallel Distrib. Process. Symp. (IPDPS), 2018. [Google Scholar]
  14. Z. Wang, G. Tournavitis, B. Franke, and M. F. P. O’Boyle, “Integrating profile-driven parallelism detection and machine-learningbased mapping,” ACM Trans. Archit. Code Optim., Vol. 11, no. 1, p. 2, 2014. [Google Scholar]
  15. M. K. Emani and M. O’Boyle, “Celebrating diversity: A mixture of experts approach for runtime mapping in dynamic environments,” in Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation, ser. PLDI ’15, 2015, pp. 499–508. [Google Scholar]
  16. M. K. Emani and M. O’Boyle, “Change detection based parallelism mapping: Exploiting offline models and online adaptation,” in Languages and Compilers for Parallel Computing: 27th International Workshop (LCPC 2014), 2014, pp. 208–223. [Google Scholar]
  17. Y. Zhang, M. Voss, and E. S. Rogers, “Runtime empirical selection of loop schedulers on hyperthreaded smps,” in 19th IEEE International Parallel and Distributed Processing Symposium, ser. IPDPS ’05, 2005. [Google Scholar]
  18. Z. Wang and M. F. O’Boyle, “Mapping parallelism to multi-cores: A machine learning based approach,” in Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, ser. PPoPP ’09, 2009, pp. 75–84 [Google Scholar]
  19. Y. Li, “Deep reinforcement learning: An overview, ” CoRR, 2017. [Google Scholar]
  20. Sameer Kulkarni and John Cavazos. 2012. Mitigating the compiler optimization phaseordering problem using machine learning. In Proceedings of the ACM international conference on Object oriented programming systems languages and applications (OOPSLA ’12). Association for Computing Machinery, New York, NY, USA, 147–162. DOI:https://doi.org/10.1145/2384616.2384628 [Google Scholar]
  21. K. Datta et al., “Stencil computation optimization and auto-tuning on state-ofthe-art multicore architectures,” in Proc. ACM/IEEE Conf. Supercomput., Nov. 2008, pp. 1–12. [Google Scholar]
  22. P. M. Knijnenburg, T. Kisuki, and M. F. O’Boyle, “Combined selection of tile sizes and unroll factors using iterative compilation,” J. Supercomput., Vol. 24, no. 1, pp. 43–67, 2003. [Google Scholar]
  23. F. Agakov et al., “Using machine learning to focus iterative optimization”, International Symposium on Code Generation and Optimization (CGO’06), New York, NY, USA, 2006, pp. 11 pp.-305, doi: 10.1109/CGO.2006.37. [Google Scholar]
  24. M. Namolaru, A. Cohen, G. Fursin, A. Zaks, and A. Freund, “Practical aggregation of semantical program properties for machine learning based optimization,” in Proc. Proc. Int. Conf. Compil. Archit. Synth. Embedded Syst. (CASES), 2010, pp. 197–206. [Google Scholar]
  25. H. Leather, E. Bonilla, and M. O’Boyle, “Automatic feature generation for machine learning based optimizing compilation,” in Proc. 7th Annu. IEEE/ACM Int. Symp. Code Generat. Optim. (CGO), Mar. 2009, pp. 81–91. [Google Scholar]
  26. C. K. Williams and C. E. Rasmussen, “Gaussian processes for regression,” in Advances in neural information processing systems, 1996, pp. 514–520. [Google Scholar]
  27. C. E. Rasmussen and C. K. Williams, Gaussian processes for machine learning. MIT press Cambridge, 2006, Vol. 1. [Google Scholar]

Current usage metrics show cumulative count of Article Views (full-text article views including HTML views, PDF and ePub downloads, according to the available data) and Abstracts Views on Vision4Press platform.

Data correspond to usage on the plateform after 2015. The current usage metrics is available 48-96 hours after online publication and is updated daily on week days.

Initial download of the metrics may take a while.