Open Access
Issue |
ITM Web Conf.
Volume 30, 2019
29th International Crimean Conference “Microwave & Telecommunication Technology” (CriMiCo’2019)
|
|
---|---|---|
Article Number | 10002 | |
Number of page(s) | 8 | |
Section | Resistance to Radiation & Electromagnetic-Pulse Damages (6a) | |
DOI | https://doi.org/10.1051/itmconf/20193010002 | |
Published online | 27 November 2019 |
- K.I. Tapero, Radiacionnye effekty v kremnievyh integral‘nyh skhemah kosmicheskogo primeneniya (BINOM Laboratoriya znanij, Moscow, 2012) [In Russian] [Google Scholar]
- R. Baumann, K. Kruckmeyer, Radiation handbook for electronics: A compendium of radiation effects topics for space, industrial and terrestrial applications (Texas Instruments, Dallas, 2019) [Google Scholar]
- O.V. Dvornikov, V.A. Tchekhovski, V.L. Diatlov, Yu.V. Bogatyrev, S.B. Lastovski, Forecasting of bipolar integrated circuits hardness for various kinds of penetrating radiations, Int. Crimean Conference "Microwave & Telecommunication Technology", pp. 925-926 (2013) [Google Scholar]
- V. Denisenko, Modelirovanie MOP tranzistorov - metodologicheskiy aspekt, Komponenty i tekhnologii, v. 7, pp. 56-61, v. 9, pp.32-39 (2004) [Google Scholar]
- N.Z. Shvarts, Lineynye tranzistornye usiliteli SVCh (Sov. radio, Moscow, 1980) [Google Scholar]
- P. Antognetti, Semiconductor Device Modeling with SPICE (McGraw-Hill, 1988) [Google Scholar]
- https://www.silvaco.com/ [Google Scholar]
- https://www.cadence.com/ [Google Scholar]
- SPICE Models Manual (Silvaco, Santa Clara, 2019) [Google Scholar]
- SmartSpice User’s Manual (Silvaco, Santa Clara, 2019) [Google Scholar]
- Cadence SPICE Reference Manual (Cadence Design Systems, 2000) [Google Scholar]
- https://www.simplistechnologies.com/ [Google Scholar]
- H. Ding, J.J. Liou, K. Green, C.R. Cirba, A new model for four-terminal junction field-effect transistors, Solid-State Electronics, v. 50, i. 3, pp. 422–428 (2006) [CrossRef] [Google Scholar]
- H. Ding, An improved junction capacitance model for junction field-effect transistors, Solid-State Electronics, v. 50, i. 7, pp. 1395–1399 (2006) [CrossRef] [Google Scholar]
- S. Banas, J Dobes, V. Panko, Techniques of JFET Gate Capacitance Modeling, Proceedings of the World Congress on Engineering and Computer Science 2016, v. II (2016) [Google Scholar]
- S. Banas, J. Dobes, V. Panko, P. Hanyš, J. Divín, Comprehensive behavioral model of dual-gate high voltage JFET and pinch resistor, Solid-State Electronics, v. 123, pp. 133–142 (2016) [CrossRef] [Google Scholar]
- D. Tian, SIC JFET Device Modeling (Case Western Reserve University, Cleveland 2011) [Google Scholar]
- B.H. Michael, D. Shamik, SPICE-Compatible Compact Model for Graphene Field-Effect Transistors, Circuits and Systems (ISCAS), pp. 2521-2524 (2012) [Google Scholar]
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